objectives
S-R latches
gated D latches
d flip-flop
d-ce flip-flop
s-r flip-flop
j-k flip-flop
t flip-flop
make a table and derive the characteristic (next-state) equation for such latches and flip-flops. State any necessary restrictions on the input signals.
Draw a timing diagram relating the input and output of such latches and flip-flops
show how latches and flip-flops can be constructed using gates. Analyze the operation of a flip-flop that is constructed of gates and latches.
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